Synchronous rectification mode dc-to-dc converter power supply device

ABSTRACT

A DC-to-DC converter power supply device includes drive circuits for generating different drive waveforms from a drive pulse of an oscillation control circuit portion; a first switching element driven by a drive circuit; a second switching element driven by a drive circuit; and a third switching element connected in parallel to a second diode of the second switching element and driven by the drive circuit.

This Application is a U.S. national phase Application of PCTInternational Application PCT/JP03/14301.

TECHNICAL FIELD

The present invention relates to a DC-to-DC converter power supply usedin electronic equipment such as televisions, VTRs, cameras, personalcomputers and peripheral equipment thereof to stabilize the outputvoltage by controlling the pulse width.

BACKGROUND ART

Recently, a DC-to-DC converter power supply for stabilizing the outputvoltage by controlling the pulse width has been widely used inelectronic equipment. Furthermore, in order to achieve higherefficiency, also a synchronous rectification mode DC-to-DC converterpower supply for reducing the loss of the forward voltage of arectifying diode has been used in various cases in accordance withincreased development of IC control circuits (see, for example, patentdocument 1: Japanese Patent Unexamined Publication No. 09-261950). FIG.4 is a circuit diagram showing an example of a conventional DC-to-DCconverter power supply; and FIG. 5 shows timing charts of main waveformsthereof. FIG. 4 shows an example of a case in which 3.3 V output and 1.8V output are obtained from one DC input. Firstly, a 3.3 V output systemis described.

When a DC voltage (for example, 5V to 10V of DC) is applied to DC input1, oscillation and synchronization control circuit 30 that is a controlIC starts to operate, further, drive circuit 5 is driven and P-channelMOS-FET 3 that is a switching element (hereinafter, abbreviated asMOS-FET 3) is driven. The drive waveform thereof is a voltage waveformat point k in FIG. 5 and the voltage at high level (time from t4 to t1)is substantially the same as that of DC input 1. Oscillation andsynchronization control circuit 30 used herein is an IC having a specialspecification in which two kinds of drive pulses as shown in waveformsat points k and n in FIG. 5 are used with one-channel output, and thesetwo drive pulses set dead time (which means a time when both two drivesare turned OFF) in consideration of the rise time and the fall time ofON/OFF of MOS-FET to be driven respectively.

MOS-FET 3 is turned ON when gate voltage k is at low level (t1 to t4)and is turned OFF when gate voltage k is at high level (t4 to t1).Therefore, the output voltage of MOS-FET 3 is a voltage having a voltagewaveform at point j in FIG. 5. This voltage is applied to coil 10. Anelectric current flowing in coil 10 during an ON period (t1 to t4) ofMOS-FET 3 is an electric current having a current waveform at point m(time from t1 to t4) in FIG. 5. When an inductance value of coil 10 issmall, the slope is steep and the peak value of the electric currentbecomes large. On the other hand, when an inductance value of coil 10 islarge, the slope is gentle and the peak value of the electric currentbecomes small. In any case, it is necessary to select the inductancevalue of coil 10 so that the core of the coil is not saturated.

When MOS-FET 3 is turned OFF, the electric current flowing in coil 10 isnot supplied, so that a counter electromotive force is generated at bothends of coil 10 and the potential at point j becomes negative and isclamped at the forward voltage of diode 9. As a result, energyaccumulated in coil 10 becomes an electric current, and the electriccurrent flows through loads (not shown) connected to capacitor 13 andfirst output 14 and diode 9. This electric current is called a refluxcurrent and the loss thereof is reduced as a forward voltage of diode 9is lower. Therefore, a schottky-barrier diode (hereinafter, referred toas SBD) is often used. In this case, however, the forward voltage isabout 0.3V to 0.6V.

Therefore, during an ON period (t4 to t1) of diode 9, an element havinga forward voltage lower than that of diode 9, that is, having a smallerloss is used to turn ON so as to allow a reflux current to bypass,thereby enabling the loss to be further reduced. This can be realized byforming a bypass circuit as follows. N-channel MOS-FET 32 that is aswitching element (hereinafter, referred to as MOS-FET 32) is turned ONwith the voltage waveform from t5 to t6 at point n by drive circuit 31.In general, in MOS-FET 32, voltage drop during an ON period can beexpected to be 0.1V or less. Since it is lower than the forward voltageof diode 9 (0.3V to 0.6V), during the time, the reflux current flowsthrough MOS-FET 32. This is described with reference to FIG. 5. Theoutput waveform of drive circuit 31 is a voltage waveform at point n,and MOS-FET 32 is turned OFF at low level (t6 to t5). At this time, anelectric current flows in diode 9 at the time from t4 to t5 and timefrom t6 to t1 as shown in the current waveform at point o. Furthermore,when the output of drive circuit 31 is at high level (t5 to t6), MOS-FET32 is turned ON, and an electric current flows during the time from t5to t6 as shown in the current waveform at point p.

Then, when looking at a portion at low level (t4 to t1) of the voltagewaveform at point j, in the timings when diode 9 is ON, i.e., thetimings from t4 to t5 and from t6 to t1, the voltage level of theforward voltage is between about −0.3V and −0.6V. On the other hand, inthe timing when MOS-FET 32 is ON, i.e., the timing when an electriccurrent is flowing in point p (t5 to t6), the voltage level is about−0.1V.

Then, by dividing and detecting the 3.3V output voltage with the use ofresistors 11 and 12 and feeding back the voltage to oscillation andsynchronization control circuit 30, the ON period of MOS-FET 3 iscontrolled and at the same time the ON period of MOS-FET 32 iscontrolled so as to carry out an operation so that the output is keptconstant. Therefore, the shorter the period when an electric currentflows in diode 9 is, the less the loss is and higher efficiency can beachieved. On the other hand, the ON period of MOS-FET 3 and the ONperiod of MOS-FET 32 coincide with each other, a large current flows,which may lead to destruction of the switching element. Therefore, careshould be taken.

The basic operation of the 1.8V system output is the same as that of the3.3V system output mentioned above, and thus the description therefor isomitted herein.

However, this conventional synchronous rectification mode DC-to-DCconverter power supply, in which a plurality of outputs with differentvoltages are obtained from one input, has disadvantages that it isnecessary to construct circuits respectively for each output system byusing an oscillation and synchronization control circuit, a drivecircuit and MOS-FET, and the like, thus increasing the circuit size.Another disadvantage is that in order to allow a plurality of drivecircuits to be synchronized and controlled, it is necessary to use aspecial-purpose control IC as an oscillation and synchronization controlcircuit, thus increasing the cost.

SUMMARY OF THE INVENTION

A synchronous rectification mode DC-to-DC converter power supply device,including a first switching power supply means; and a second switchingpower supply means for carrying out synchronous rectification based on adrive pulse of the first switching power supply means. The firstswitching power supply means includes an oscillation control meansoperating by a DC input power supply and outputting a drive pulse; afirst drive means for outputting a drive waveform based on the drivepulse from the oscillation control means; a first switching elementbeing driven by the output of the first drive means; a first rectifyingmeans having a positive electrode being grounded and a negativeelectrode being connected to the output of the first switching element;and a first coil being connected to the output of the first switchingelement. The second switching power supply means includes a second drivemeans for outputting a drive waveform based on the drive pulse from theoscillation control means; a second switching element being driven bythe output of the second drive means; a second rectifying means having apositive electrode being ground and a negative electrode being connectedto the output of the second switching element; a third switching elementbeing connected in parallel to the second rectifying means and driven bythe output of the first drive means; and a second coil being connectedto the output of the second switching element.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing a synchronous rectification mode DC-to-DCconverter power supply device in accordance with a first exemplaryembodiment of the present invention.

FIG. 2 shows main timing charts of waveforms of the synchronousrectification mode DC-to-DC converter power supply device in accordancewith the first exemplary embodiment of the present invention.

FIG. 3 is a diagram showing a synchronous rectification mode DC-to-DCconverter power supply device in accordance with a second exemplaryembodiment of the present invention.

FIG. 4 is a diagram showing a conventional synchronous rectificationmode DC-to-DC converter power supply device.

FIG. 5 shows main timing charts of waveforms of a conventionalsynchronous rectification mode DC-to-DC converter power supply device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Hereinafter, exemplary embodiments of the present invention aredescribed with reference to FIGS. 1 to 3.

First Exemplary Embodiment

FIG. 1 shows a first exemplary embodiment. A synchronous rectificationmode of the first exemplary embodiment has a configuration in which twoDC outputs are obtained from one DC input and a drive pulse of a 3.3Vsystem first switching power supply means synchronously rectifies a 1.8Vsystem second switching power supply means.

In FIG. 1, elements that are the same as or have the same functions asthose in FIG. 4 are given the same reference numerals. Furthermore,waveforms at points a to i in FIG. 2 show timing charts of waveforms ofmain portions in FIG. 1. Furthermore, in the case of current waveform,the direction in which an electric current flows is indicated by anarrow.

Hereinafter, an operation of a synchronous rectification mode DC-to-DCconverter power supply according to the first exemplary embodiment isdescribed in detail. Firstly, a first switching power supply means forgenerating first output 14 from DC input 1 is described. When a DCvoltage (for example, 5V to 10V of DC) is applied to DC input 1,oscillation control circuit 201 constructed in oscillation controlcircuit portion 2 starts to operate and drive circuit 5 is driven. Theoutput therefrom drives P-channel first MOS-FET 3. Since oscillationcontrol circuit 201 outputs only one kind of drive pulse as shown inpoint b in FIG. 2, it is distinguished from conventional oscillation andsynchronization control circuit 30. Furthermore, with such a simpleconfiguration, it is possible to use a low-cost and general-purposecontrol IC.

A first drive waveform that is an output waveform of first drive circuit5 is a voltage waveform at point b in FIG. 2 and a voltage at high level(t6 to t1) is substantially the same voltage as that of DC input 1.First MOS-FET 3 is turned ON when gate voltage b is at low level (t1 tot6) and turned OFF when gate voltage b is at high level (t6 to t1).Therefore, the output voltage of first MOS-FET 3 is shown in the voltagewaveform at point a in FIG. 2. Then, the output of first MOS-FET 3 isapplied to first coil 10. An electric current flowing during an ONperiod of first MOS-FET 3 is shown in the current waveform (t1 to t6) atpoint c in FIG. 2. When an inductance value of coil 10 is small, theslope is steep and the peak value of the electric current becomes large.On the other hand, when an inductance value of coil 10 is large, theslope is gentle and the peak value of the electric current becomessmall. In any case, it is necessary to select the inductance value sothat the core of first coil 10 is not saturated.

When first MOS-FET 3 is turned OFF, since the electric current flowingin coil 10 is not supplied, a counter electromotive force is generatedat both ends of coil 10 and the potential at point a is becomingnegative. However, since an electric current flows through first diode9, the electric potential is kept (clamped) at substantially 0V(actually about −0.3V to −0.6V) as shown in the voltage waveform (t6 tot1) at point a in FIG. 2. As a result, energy accumulated in first coil10 becomes an electric current, the electric current flows through loadsof first capacitor 13 and first output and first diode 9. This electriccurrent is called a reflux current. The loss thereof is reduced as aforward voltage of diode 9 is lower. Then, by dividing and detecting thevoltage by the use of first detection circuit composed of firstresistors 11 and 12 and feeding the voltage back to oscillation controlcircuit 2, an ON period (t1 to t6) of first MOS-FET 3 is controlled, sothat a 3.3V output 14 is controlled to be kept constant.

Next, a second switching power supply means for generating second output26 from DC input 1 is described. Similar to the first switching powersupply means, oscillation control circuit 201 constructed in oscillationcontrol circuit portion 2 starts to operate and oscillation signal isinput. Control circuit 202 which operates in the same frequency drivessecond drive circuit 15, and the output therefrom drives P-channelsecond MOS-FET 17.

The output of the second drive circuit has a voltage waveform shown atpoint f in FIG. 2 and a voltage at high level (t5 to t2) issubstantially the same as the voltage of DC input 1. Furthermore, thevoltage waveform at point f operates phase-synchronously to the voltagewaveform at point b of first switching power supply means. Since theoutput of the second switching power supply means is 1.8V, an ON periodis shorter at point f as compared with that at point b. Second MOS-FET17 is turned ON when gate voltage f is at low level (t2 to t5) andturned OFF when gate voltage f is at high level (t5 to t2). The outputvoltage of second MOS-FET 17 has a voltage waveform shown at point e inFIG. 2, in which a time from t2 to t5 is an ON period and a time from t5to t2 is an OFF period. In more detail, during times from t5 to t6 andfrom t1 to t2, electric current flows in diode 21 and the voltage atthat time is about −0.3V to −0.6V. On the other hand, during the timefrom t6 to t1, N-channel third MOS-FET 20 is tuned ON and the voltage isabout −0.1V. This voltage (t2 to t5) is applied to second coil 22. Anelectric current flowing during the ON period of second MOS-FET 17 isshown in a current waveform (t2 to t5) at point g in FIG. 2. When aninductance value of second coil 22 is small, the slope of the waveformis steep and the peak value of the electric current becomes large. Onthe other hand, when an inductance value of second coil 22 is large, theslope of the waveform becomes gentle and the peak value of the electriccurrent becomes small. In any case, it is necessary to select theinductance value so that the core of the second coil is not saturated.

Note here that when second MOS-FET 17 is turned OFF (t5 to t2), theelectric current flowing in second coil 22 is not supplied, so that acounter electromotive force is generated at both ends of second coil 22.Then, the potential at point e is becoming negative. However, since anelectric current flows through first diode 21, the electric potential iskept (clamped) at substantially 0V (actually about −0.3V to −0.6V) asshown in the voltage waveform (t5 to t2) at point e in FIG. 2. As aresult, energy accumulated in second coil 22 becomes electric current,and a reflux current flows through loads of second smoothing capacitor25 and second output and second diode 21. The loss of the reflux currentis reduced as the forward voltage of second diode 21 becomes lower.

To second diode 21, third MOS-FET 20 is connected in parallel. To a gateof third MOS-FET 20, via a waveform shaping circuit composed ofcapacitor 7 and resistor 8, output of first drive circuit 5 isconnected. Needless to say, the same effect can be obtained even in thecase where the waveform shaping circuit is omitted and third MOS-FET 20is directly driven by the output of first drive circuit 5. However, fromthe viewpoint that optimal drive conditions can be adjusted easily, thewaveform shaping circuit is useful.

With this configuration, N-channel third MOS-FET 20 is turned ON when avoltage waveform at point b is at high level (t6 to t1) and is turnedOFF when the voltage waveform is at low level (t1 to t6). If thirdMOS-FET 20 is kept OFF, an electric current having the waveform shown bya dotted line at point h1 in FIG. 2 flows in diode 21, resulting in thata voltage at point e is always about −0.3V to −0.6V during this time (t1to t6). However, when ON/OFF of third MOS-FET 20 is controlled, anelectric current having the waveform shown at point h2 flows in seconddiode 21 and an electric current having the waveform shown at point i(t6 to t1) flows in third MOS-FET 20. That it to say, the electriccurrent at point h1 flowing in second diode 21 is allowed to bypass tothird MOS-FET 20 during the time when third MOS-FET 20 is turned ON (t6to t1). As a result, the voltage waveform at point e becomes about −0.1Vduring a time from t6 to t1 as shown in FIG. 2, and it is possible toreduce the loss owing to high voltage of the forward voltage of diode21, thus achieving high efficiency of the circuit.

Then, by dividing and detecting the voltage by the use of seconddetecting resistors 23 and 24 and feeding back the voltage to controlcircuit 202, an ON period (t2 to t5) of second MOS-FET 17 is controlled,so that a 1.8V output 26 is controlled to be kept constant.

Note here that the less an electric current flows in the diode 21, theless the loss is and higher efficiency can be achieved. Therefore, it isdesirable that drive circuits 5 and 15 are configured so that theperiods from t5 to t6 and from t1 to t2 are shorter. However, theyshould be configured under the following conditions: in the transitionstate in which each MOS-FET is changed between ON and OFF, dead time(which means a time when both drives are in OFF) is set in considerationof the rise time and the fall time of ON/OFF of MOS-FETs to be drivenrespectively. When the ON period of second MOS-FET 17 and the ON periodof third MOS-FET 20 coincide with each other, a large current flows,which may lead to destruction of the switching element. Therefore, careshould be taken. This means that the synchronous rectification mode ofthe first exemplary embodiment is applied to a 1.8V system. On thecontrary, however, it is not possible to synchronously rectify a 3.3Vsystem by the drive pulse of a 1.8V system, because the ON period ofMOS-FET 3 and the ON period of MOS-FET 32 coincide with each other asshown in FIG. 6 of a conventional example.

As mentioned above, in the first exemplary embodiment, a circuit can beshared by a plurality of output channels. As a result, the circuit sizecan be reduced. Furthermore, the loss owing to high forward voltage of adiode can be reduced by MOS-FET connected in parallel, thus achievinghigh efficiency in a circuit. Furthermore, this configuration has aneffect that since it is sufficient that only one kind of drive pulse isoutput as an output of the oscillation control circuit, a multi-channelDC-to-DC converter power supply can be configured by using a low-costand general-purpose control IC instead of an expensive andspecial-purpose control IC and thus synchronous rectification mode canbe achieved easily.

Note here that in addition to the configuration of the first exemplaryembodiment, there is another configuration in which, in a 3.3V systemfirst switching power supply means, N-channel sixth MOS-FET is connectedin parallel to diode 9 that is a first rectifying means, and an outputof the other oscillation control circuit constructed in oscillationcontrol circuit portion 2 is connected to a gate of N-channel sixthMOS-FET, thereby improving the efficiency of the 3.3V system of firstswitching power supply means. This has an effect that the loss owing toa high voltage of a forward voltage of diode can be reduced, thusachieving higher efficiency than that of the first exemplary embodiment.

Second Exemplary Embodiment

FIG. 3 shows a second exemplary embodiment of the present invention. Asynchronous rectification mode of the second exemplary embodiment has aconfiguration in which three DC outputs are obtained from one DC input.In this configuration, in addition to the configuration of the firstexemplary embodiment, further a 1.2V system third switching power supplymeans is synchronously rectified by a drive pulse of a 1.8V systemsecond switching power supply means.

Waveforms from points a to z in FIG. 2 show timing charts of waveformsof main portions in FIG. 3. In FIG. 3, elements that are the same as orhave the same functions as those in FIG. 1 are given the same referencenumerals. Furthermore, the synchronous rectification mode DC-to-DCconverter power supply of the second exemplary embodiment includes thirddrive circuit 41, resistors 42 and 43, P-channel fourth MOS-FET 44 thatis a fourth switching element (hereinafter, abbreviated as fourthMOS-FET 44), third diode 45, third coil 46, third detection resistors 47and 48, third smoothing capacitor 49, third output 50, resistor 51,N-channel fifth MOS-FET 52 of a fifth switching element (hereinafter,abbreviated as fifth MOS-FET 52), capacitor 53 and resistor 54 inaddition to the first exemplary embodiment.

Hereinafter, an operation of the synchronous rectification mode DC-to-DCconverter power supply according to the second exemplary embodiment isdescribed in detail. The operations of the first switching power supplymeans and the second switching means are the same as those in the firstexemplary embodiment, and therefore, the descriptions therefor areomitted. A third switching power supply means for generating thirdoutput 50 from DC input 1 is described. The operation of the thirdswitching power supply means is basically the same as that of the secondswitching power supply means. Firstly, oscillation control circuit 201constructed in oscillation control circuit portion 2 starts to operate,and the oscillation signal therefrom is input. Third drive circuit 41 isdriven by control circuit 203 operating in the same frequency andP-channel fourth MOS-FET 44 is driven. The output of the third drivecircuit is a voltage waveform at point w in FIG. 2. Furthermore, theoutput voltage of fourth MOS-FET 44 has a voltage waveform at point 1 inFIG. 2, which is applied to third coil 46.

When fourth MOS-FET 44 is turned OFF, since the electric current flowingin third coil 46 is not supplied, a counter electromotive force isgenerated at both ends of third coil 46 and a potential at point 1becomes negative and clamped at a forward voltage of third diode 45. Asa result, a reflux current flows through loads of third smoothingcapacitor 49 and third output and third diode 45.

To third diode 45, N-channel fifth MOS-FET 52 is connected in parallel.Fifth MOS-FET 52 is connected to second drive 15 via a waveform shapingcircuit composed of capacitor 53 and resistor 54 so that an ON period(t5 to t2) is controlled. With this configuration, drive voltage havinga waveform that is similar to that at point f in FIG. 2 is applied to agate of fifth MOS-FET 52. As a result, fifth MOS-FET 52 is turned ONwhen the voltage waveform at point f is at high level (t5 to t2) andturned OFF when a voltage waveform is at low level (t2 to t5). Anelectric current flows in third diode 45 during the period of time fromt4 to t5 and from t2 to t3 at point z and is allowed to bypass to fifthMOS-FET 52 during an ON period (t5 to t2) of fifth MOS-FET 52 as shownby point y. Then, by dividing and detecting the voltage by the use ofthird detection resistors 47 and 48 and feeding back the voltage tooscillation control circuit 2, an ON period of fourth MOS-FET 44 iscontrolled, so that 1.2V output 50 is controlled to be kept constant.

As mentioned above, in the second exemplary embodiment, the same effectcan be obtained even when three-channel output is used as an outputchannel.

Note here that, in the second exemplary embodiment, fifth MOS-FET 52 ofa third switching power supply means is driven by second drive circuit15 of the second switching power supply means, but it may be driven byfirst drive circuit 5 of the first switching power supply means.However, the circuit having a configuration mentioned in the secondexemplary embodiment is highly efficient and more desirable.Hereinafter, the reason therefor is described. The period of time when areflux current flowing in third diode 45 depends upon the period whenfifth MOS-FET 52 is turned ON. Furthermore, when first output 14 is setto 3.3V and second output 26 is set to 1.8V, the driving period, thatis, the period when voltage becomes at high level is longer in thesecond drive circuit 15 as shown in the waveforms at points b and f.Therefore, in order to allow a larger amount of reflux current flowingin the third diode 45 to bypass, it is desirable to carry out driving bythe use of second drive circuit 15 of the second switching power supplymeans.

Note here that it can be easily understood that even in a case wheremore output, lower voltage and larger amount of current are required,the configuration of the present invention can be achieved bysynchronizing an oscillation control circuit. Furthermore, theconfiguration of the present invention can be achieved by a low-costcontrol IC without requiring expensive and special-purpose control ICfor synchronous rectification.

As described above, according to the present invention, a circuit can beshared by a plurality of output channels and one oscillation controlcircuit portion, resulting in reducing the circuit size. Furthermore,the configuration of the present invention has an effect that since itis sufficient that one kind of drive pulse is output as an output ofoscillation control circuit portion, a multi-channel DC-to-DC converterpower supply can be configured by a low-cost general-purpose control ICinstead of an expensive special-purpose control IC, and thus synchronousrectification mode can be achieved easily.

INDUSTRIAL APPLICABILITY

A DC-to-DC converter power supply is used in electronic equipment suchas televisions, VTRs, cameras, personal computers and peripheralequipment thereof to stabilize the output voltage by controlling thepulse width. A synchronous rectification mode DC-to-DC converter powersupply device is provided with low cost and high efficiency.

1. A synchronous rectification mode DC-to-DC converter power supplydevice, comprising: a first switching power supply circuit; and a secondswitching power supply circuit for carrying out synchronousrectification based on a drive pulse of the first switching power supplycircuit, wherein the first switching power supply circuit comprises: anoscillation control circuit operating by a DC input power supply andoutputting a drive pulse; a first drive circuit for outputting a drivevoltage based on the drive pulse from the oscillation control circuit; afirst switching element being driven by the output of the first drivecircuit; a first rectifying circuit having a positive electrode beinggrounded and a negative electrode being connected to the output of thefirst switching element; and a first coil being connected to the outputof the first switching element; and the second switching power supplycircuit comprises: a second drive circuit for outputting a drive voltagebased on the drive pulse from the oscillation control circuit; a secondswitching element being driven by the output of the second drivecircuit; a second rectifying circuit having a positive electrode beingground and a negative electrode being connected to the output of thesecond switching element; a third switching element being connected inparallel to the second rectifying circuit and driven by the output ofthe first drive circuit; and a second coil being connected to the outputof the second switching element; and wherein the third switching elementis turned on during an OFF period of the first switching element andturned off during an ON period of the first switching element.
 2. Thesynchronous rectification mode DC-to-DC converter power supply deviceaccording to claim 1, wherein an OFF period of the second switchingelement longer than the OFF period of the first switching element, atiming when the first switching element is turned off is later than atiming when the second switching element is turned off, and a timingwhen the second switching element is turned on is later than a timingwhen the first switching element is turned on.
 3. The synchronousrectification mode DC-to-DC converter power supply device according toclaim 1, further comprising a third switching power supply circuit forcarrying out synchronous rectification based on the drive pulse of thesecond switching power supply circuit, wherein the third switching powersupply circuit comprises: a third drive circuit for outputting a drivevoltage based on the drive pulse from the oscillation control circuit; afourth switching element driven by the output of the third drivecircuit; a third rectifying circuit having a positive electrode beinggrounded and a negative electrode being connected to the output of thefourth switching element; a fifth switching element being connected inparallel to the third rectifying circuit and being driven by the outputof the second drive circuit; and a third coil connected to an output ofthe fourth switching element wherein the fifth switching element isturned on during an OFF period of the second switching element andturned off during an ON period of the second switching element.
 4. Thesynchronous rectification mode DC-to-DC converter power supply deviceaccording to claim 3, wherein, an OFF period of the fourth switchingelement longer than the OFF period of the second switching elements, atiming when the second switching element is turned off is later than atiming when the fourth switching element is turned off, and a timingwhen the fourth switching element is turned on is later than a timingwhen the second switching element is turned on.
 5. The synchronousrectification mode DC-to-DC converter power supply device according toclaim 1, further comprising a sixth switching element being connected inparallel to the first rectifying circuit and driven by the output of theoscillation control circuit.
 6. The synchronous rectification modeDC-to-DC converter power supply device according to claim 1, furthercomprising a first waveform shaping circuit being connected between thefirst drive circuit and the third switching element, wherein the firstwaveform shaping circuit includes a first resistor in parallel with afirst capacitor.
 7. The synchronous rectification mode DC-to-DCconverter power supply device according to claim 3, further comprising:a first waveform shaping circuit being connected between the first drivecircuit and the third switching element, and a second waveform shapingcircuit being connected between the second drive circuit and the fifthswitching element, wherein the first waveform shaping circuit includes afirst resistor in parallel with a first capacitor, and wherein thesecond waveform shaping circuit includes a second resistor in parallelwith a second capacitor.